Note that this site is intended as an information and education repository.
Readers assume all risks and liabilities associated with the use of any
information contained herein. The author assumes no liability of any kind for
errors, omissions, or claims
against any individual or corporation for use of the information contained
MOSFET Current Limit
This circuit provides a current-limited DC output voltage. As shown, the circuit limits the output current to a maximum of 1.2A and includes a visual indicator of a current-limit condition. During normal operation (i.e., load current is less than the limit value) the MOSFET should be fully on. As the load increases (load resistance decreases) to the point at which the current limit is reached, the circuit should decrease Vout to ensure the output current design limit is not exceeded.
Design Details -- How it Works
Biasing the MOSFET
Referring to the schematic, R2 and R3 form a voltage divider providing bias to Q2. The supply voltage for this circuit is +V=75V. From the datasheet for the IRF5210, the minimum gate to source voltage is VGS = -20V. Since the gate voltage is supplied from the divider network, we have (see voltage divider tutorial):
75*R3/(R2+R3) - 75 > -20 (ignoring the voltage drop across the sense resistor R1). Simplifying:
75*R3/(R2+R3) > 55 or 75*R3 > 55*(R2+R3). Therefore, 20*R3 > 55*R2 or R2 < .36*R3. However, to turn Q2 on, we must ensure that the gate voltage is less than the gate threshold voltage VT. Moreover, since we want Q2 fully on, we should design for a gate to source voltage < -10V. Therefore,
75*R3/(R2+R3) -75 < -10 or 10*R3 < 65*R2. Rearranging yields: .154*R3 < R2. This yields the following range for R2:
.154*R3 < R2 < .36*R3. Selecting R2=100K implies 277K < R3 < 649K Therefore, R3=470K is selected.
These values for R2 and R3 yield a bias voltage of 61.8V or VGS = -13.2V; hence, the current flowing through R3 is given by Ohm's law as:
61.8/470K = 131.5uA.
The current limiting capabilities of the circuit are provided by sense resistor R1 in conjunction with the 2N3906 PNP transistor, Q1 . A voltage drop will develop across sense resistor, R1, as current, Is, passes from +V to Q2. This voltage drop is given by Ohm's law as: Is*R1 and appears across the VEB junction of Q1.
Transistor, Q1, will remain off until its emitter to base voltage exceeds the emitter to base forward diode drop (approximately .6V). Therefore, from Ohm's law, the value of the current through R1 at which Q1's emitter to base voltage exceeds the .6V diode drop is given by: .6V = Is*.5 or Is=1.2A. How does this limit current, Is? As VEB increases above .6V, current begins to flow out of the collector of Q1 and through R3 to ground. Therefore, the total current passing through R3 increases -- from the bias current of 131.5uA (see above) -- by the amount supplied by the collector of Q1. The net effect of increased current through R3 is an increase in the gate voltage of Q2, and therefore an increase in the VGS voltage. VGS will continue to rise until it approaches VT at which point Q2 will begin to shutdown, reducing Is, and hence the collector current of Q1; thereby, reducing the VGS voltage. Ultimately, a balance will be reached whereby Q2 supplies sufficient current to supply a VGS value that limits the Is current to 1.2A.
Current Limit Indicator
Transistors Q3 and Q4 in conjunction with LED D2 and limiting resistor R5 form the current limit indicator sub circuit. The behavior of the current limit indicator sub circuit is similar to the current limit circuit described above in that the collector of Q3 provides current to the base of Q4 in response to an increase in the VEB voltage of Q3 as the current through sense resistor R1 increases.
Fine print: Note that this site is intended as an information and education repository. Readers assume all risks and liabilities associated with the use of any information contained herein. The author assumes no liability of any kind for errors, omissions, or claims against any individual or corporation for use of the information contained herein.